CMPS 5133: Advanced Computer Architecture

Fall semester 2005

 

Instructor: Dr. Nelson L. Passos
Office: Bolin Science Hall 126B
Office phone: 397-4129
E-mail: nelson.passos@mwsu.edu
Office Hours: MTWR 9:00 - 11:00 am
W         1:00 - 3:00 pm
Class Hours: MW 7:00 - BO 320


Course Description:


Comprehensive study of topics of scalable and parallel architectures, including performance measurement, pipelining, cache and memory technology, instruction-level parallelism, superscalar processors, parallel processors, and multithread systems.

Text book:

Modern processor Design, by J. P. Shen and M. H. Lipasti (1st edition).

Lecture Notes:

Revised CMPS 5133 part 1

CMPS 5133 part 2

Agenda:

August     September     October     November     December     Grading

August



Aug 29-

Processor design

Aug 31-

Performance and ILP

 



September


Sep 5-

Labor Day

Sep 7-

Pipelining

Sep 12-

Pipelined processor design

Sep 14-

Minimizing stalls

 

Assignment # 1

Sep 19-

Commercial processors

Sep 21-

Memory fundamentals

 

Assignment # 2

Sep 26-

Caching

Sep 28-

Virtual memory

 

Assignment # 3



October


Oct 3-

Page Tables

Oct 5-

Input/output systems

 

Assignment # 4

Oct 10-

Input/output systems

Oct 12-

Superscalar

Oct 17-

Parallel pipelines

Oct 19-

Test # 1

Oct 24-

Superscalar pipelines

Oct 26-

Branch prediction

Oct 31-

Branch prediction



November


Nov 2-

Register reuse

Nov 7-

Data dependencies

Nov 9-

Tomasulo algorithm

 

Assignment # 5

Nov 14-

Reservation stations

Nov 16-

Memory access

 

Assignment # 6

Nov 21-

Test # 2

Nov 23-

Thanksgiving Holidays

Nov 24-

Thanksgiving Holidays

Nov 28-

Threads (chapter 11)

Nov 30-

Multi-processors



December


Dec 5-

Multithread processors

Dec 7-

Multithread processors

Dec 12-

Finals (Monday, 7:30 pm)



Grading



Tests: 20 % (each)
Final Exam: 20 %
Assignments: 20 %
Project: 15 %
Class Participation: 5 %


E-mail address:

nelson.passos@mwsu.edu

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