"Nested Loops Optimization for Multiprocessor Architecture Design"

(by A. Leonardi, N. L. Passos, and E. H.-M. Sha) in the Proceedings of the 1998 Midwest Symposium on Circuits and Systems, Notre Dame, IN, August, 1998, pp. 415-418.



  Multi-dimensional systems, including image processing, geophysical signal processing, and fluid dynamics, are becoming one of the most important targets of computational improvement studies. Most of the optimized solutions to those problems point to the use of Application Specific Integrated Circuits (ASICs). From the analysis of the multi-dimensional programming code, one can observe that nested loop like structures are often the most time consuming part. Designing ASICs with multiple processing units is usually the appropriate solution to achieve the required computational performance. In this paper, a new loop transformation algorithm, which allows an efficient utilization of the multiprocessor system is presented. Uniform nested loops are modeled as multi-dimensional data flow graphs. New loop structures are generated so that an arbitrary number of processors available in the system can run in parallel. An example demonstrates the effectiveness of the algorithm.


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