"ASIC Design for Conditional Nested Loops with Predicate Registers"

( by B.Sinclair , R.Light, and N.Passos) in the Proceedings of the 1999 Midwest Symposium on Circuits and Systems, Las Cruces, NM, August, 1999, pp. WA1.3



  Branch predication techniques utilize predicate registers to control the validity of speculatively computed results. These registers are significant obstacles in the performance gain achievable by the overlap of successive iterations of nested loops. This paper presents a process of designing and dimensioning those registers while optimizing the computational time of the loop


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